An FPGA Based Real Time Reservoir Computing System for Neuromorphic Processors

Abstract

In this paper, a real-time Field Programmable Gate Array (FPGA) implementation of the Echo State Network (ESN) architecture of Recurrent Neural Network (RNN) training has been presented, which computes the output weights of the particular Reservoir Computing (RC) architecture in FPGA in real-time. The proposed implementation is in strict conformance with the RC theory. The four parts of the ESN architecture, which are the input block, reservoir block, output block, and weight training block, were all constructed in FPGA. The training of the ESN was completed in real-time and its performance verified through implementation in Altera FPGA. The error rate is 8% in sinusoidal pattern recognition task, which showed that the proposed real-time FPGA implementation of the ESN can realize short-time memory and recognize various periodicities of input signals after training. The proposed method shows the massive parallel processing capability of the RC.