Abstract
This letter presents an extension of the analytical method proposed in (Mader and Popovic, 1995) to determine the impedance of the load network of a class E power amplifier (PA). The extended method lies in a new analytical expression for calculating the output load network, which allows for the parasitic elements and the time that the input signal takes for saturating the field effect transistor (FET). To demonstrate the usefulness of the extended method, two class E PA at 6 GHz, 4 V were designed and compared. One of them was designed using the classical method, while the second was designed using the extended method. Both amplifiers were fabricated on a Duroid substrate and the transistor used was a GaAs FET FLK057WG. The amplifier, designed with the extended method, exhibits an improvement on the power added efficiency of 18.6% in comparison with the amplifier designed using the classical theory.
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