An experimental study on substrate coupling in bipolar/BiCMOS technologies

Abstract

The parasitic influence of the substrate can lead to a significant performance degradation of advanced high-speed and RF circuits. Hence, a careful circuit layout is necessary, and shielding measures such as guard rings must usually be applied. However, this might not be sufficient for high-performance circuits. Moreover, such measures often lead to an increased chip size. Therefore, not only the layout but also the technology itself should be optimized to suppress substrate coupling as much as possible. In this work, different technology-related options such as high-resistivity and SOI substrates, transistor isolation techniques, and shielding methods are investigated. Their influence on substrate coupling is determined up to 50 GHz by measurements of special test structures. The observed behavior is thoroughly explained so that guidelines for technology development and circuit design can be derived. This paper focuses primarily on RF and high-speed ICs fabricated in advanced bipolar or BiCMOS technologies using p/sup -/ substrates, although the results apply also to (RF-)CMOS circuits with such substrate materials.