An energy-efficient true random number generator based on current starved ring oscillators

Abstract

True random number generators (TRNGs) are pivotal in cryptography, Markov Chain Monte Carlo analysis, neural network simulation, industrial testing, gambling, etc., where deterministic pseudo-random number sequences are inadequate to produce satisfactory results. The demand for fast low-power TRNG is growing as such sophisticated applications are increasingly moving into mobile. This paper presents an energy-efficient on-chip TRNG design. Its random digital bits are extracted from the jitter noise of two free running current starved ring oscillators (ROs). The current starved ROs exhibit a larger jitter noise than the regular inverter based ROs because the jitter is boosted by lowering the oscillation frequency and the drain current of the transistors in the ROs. In addition, the jitter source ROs, which are the most power-hungry components of conventional oscillator based TRNGs, are biased in the subthreshold region in our proposed design to reduce their power consumption. Simulation results based on 65nm 1.2V CMOS technology show that the proposed TRNG consumes only 123 μW at a throughput rate of 96 Mbps. It outperforms the state-of-art on-chip TRNGs with a figure-of-merit of 1.28 pJ/bit. Its generated bit sequence passes all the fifteen randomness tests of the National Institute of Standards and Technology (NIST) statistical test suite.