Abstract

This paper presents an energy-efficient neural stimulator capable of providing charge-balanced asymmetric pulses. Power consumption is reduced by implementing a fully-integrated DC-DC converter that uses a reconfigurable switched capacitor topology to provide 4 output voltages for Dynamic Voltage Scaling (DVS). DC conversion efficiencies of between 63% and 76% are achieved using integrated capacitances of under 1nF and the DVS approach offers power savings of up to 53.5% compared to the front end of a typical current controlled neural stimulator. A novel charge balancing method is used which has a low level of accuracy on a single pulse and a much higher accuracy over a series of pulses. The method used is robust to process and component variation and does not require any initial or ongoing calibration. Monte-Carlo simulations indicate that the charge imbalance can be less than 0.014% (at ±3σ) of charge delivered for a series of pulses. The circuit has been designed in a commercially-available 0.18µm HV CMOS technology and is estimated to require a die area of approximately 0.9mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> for a 16 channel implementation.

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