An energy-efficient hybrid CMOS spiking neuron circuit design with a memristive based novel T-type artificial synapse

Abstract

Applications exploiting Artificial Intelligence (AI) have grown rapidly and are encountered in significant energy consumption. The organic neurons used in digital computers are mimicked by artificial neural networks (based on AI). In this perspective, AI’s Conventional computing technology, relying on the Von Neumann structure, is approaching the end of Moore’s law. To solve this problem, the memristor device concept is identified as a futuristic option for the design of neurons and synapses. The primary component of the central nervous system is the neuron, that serves as one of the crucial building blocks in the hardware implementation of spiking neural networks. Energy efficiency, power, and firing frequency are major constraints in the modelling of neurons. This work delivers the development of neurons using a Hybrid CMOS Memristor (HCM) Morris–Lecar (ML) model with a novel T-type synapse. Low power consumption in nano-watts, reduction in circuit complexity, and energy efficiency in femtojoules are the key benefits achieved through the proposed neuron model. Here, the achieved power consumption, energy efficiency, and spike frequency are 17.42 pW, 1.05 fJ, and 28.52 kHz, respectively. In addition, Moreover the achieved spike frequency in the order of kHz is helpful to advance biological plausibility.