Abstract

Conventional main memory can no longer meet the requirements of low energy consumption and massive data storage in an artificial intelligence Internet of Things (AIoT) system. Moreover, the efficiency is decreased due to the swapping of data between the main memory and storage. This paper presents a hybrid storage class memory system to reduce the energy consumption and optimize IO performance. Phase change memory (PCM) brings the advantages of low static power and a large capacity to a hybrid memory system. In order to avoid the impact of poor write performance in PCM, a migration scheme implemented in the memory controller is proposed. By counting the write times and row buffer miss times in PCM simultaneously, the write-intensive data can be selected and migrated from PCM to dynamic random-access memory (DRAM) efficiently, which improves the performance of hybrid storage class memory. In addition, a fast mode with a tmpfs-based, in-memory file system is applied to hybrid storage class memory to reduce the number of data movements between memory and external storage. Experimental results show that the proposed system can reduce energy consumption by 46.2% on average compared with the traditional DRAM-only system. The fast mode increases the IO performance of the system by more than 30 times compared with the common ext3 file system.

Highlights

  • IntroductionThe emergence of the Internet of Thing (IoT) has given rise to many opportunities and challenges

  • The emergence of the Internet of Thing (IoT) has given rise to many opportunities and challenges.In the early days, many IoT devices could only collect and send data to the cloud for analysis

  • The hybrid storage class memory (HSCM) consists of a 1-GB dynamic random-access memory (DRAM) and 3-GB Phase change memory (PCM) in a unified address space

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Summary

Introduction

The emergence of the Internet of Thing (IoT) has given rise to many opportunities and challenges. Electronics 2020, 9, 1013 solutions for a main memory architecture These byte-addressable memories are non-volatile, achieve low static energy consumption, and have a high density. The hybrid memory systems have been proposed This would allow large amounts of energy to be saved as compared to full DRAM implementation. DRAM-PCM hybrid memory system comprised of both DRAM and PCM in the physical address space can be directly accessed by processors to achieve the low access latency and high endurance of DRAM, while taking advantage of PCM’s large capacity and low static power. A fast and energy efficient scheme is proposed to provide a novel solution for applications of image processing in AIoT devices.

Hybrid Storage Class Memory
Row Buffer Architecture
Memory Access Pattern in IoT Applications
Row Buffer Locality Hybrid and Write Aware
Fast Mode for HSCM with In-Memory File System
Evaluation of Hybrid Storage Class Memory
Normalized
Performance of the Fast Mode
Conclusions
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