Abstract

This paper proposes a methodology for distance relay design to detect the fault location and mark out the protective region. We followed the intellectual property (IP) cores concept in system on chip to accomplish the development of an intelligent digital distance relay. Therefore, the field programmable gate arrays (FPGAs) technique was applied to design and implement the digital distance relay associated with the proposed method. In additional to verify the validation of the digital distance relay, we compare the result with Matlab simulation check. Then we concluded the performance of the designed distance relay is indeed superior in speed and accuracy with flexibility.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.