Abstract
A novel VLSI architecture for multi-channel online spike sorting is presented in this paper. In the architecture, the spike detection is based on nonlinear energy operator (NEO), and the feature extraction is carried out by the generalized Hebbian algorithm (GHA). To lower the power consumption and area costs of the circuits, all of the channels share the same core for spike detection and feature extraction operations. Each channel has dedicated buffers for storing the detected spikes and the principal components of that channel. The proposed circuit also contains a clock gating system supplying the clock to only the buffers of channels currently using the computation core to further reduce the power consumption. The architecture has been implemented by an application-specific integrated circuit (ASIC) with 90-nm technology. Comparisons to the existing works show that the proposed architecture has lower power consumption and hardware area costs for real-time multi-channel spike detection and feature extraction.
Highlights
Neurons are the basic elements that underlie the function of the nervous system, which contains the brain, spinal cord and peripheral ganglia
The proposed architecture has been implemented by application-specific integrated circuit (ASIC) with TSMC 90-nm technology for hardware performance evaluation
Experimental results show that the computation core sharing and clock gating are able to reduce the average area cost and power consumption per channel, respectively
Summary
Neurons are the basic elements that underlie the function of the nervous system, which contains the brain, spinal cord and peripheral ganglia. Sensors 2015, 15 signaling through the generation of action potentials. These action potentials can be recorded in vivo by placing electrodes in the vicinity of the neurons. The spikes recorded by the electrodes represent spike events generated by an unknown number of neurons. The role of spike sorting [1,2] is to assign each spike to the neuron that produced it. A typical automatic spike sorting involves complicated operations, such as spike detection, feature extraction and classification. Increasing the number of recording electrodes raises the computation time for automatic spike sorting, as detection and feature extraction become tedious tasks. Hardware solutions are necessary for neurophysiological signal recordings and analysis, where these factors are crucial
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