An efficient structure for designing a nano-scale fault-tolerant 2:1 multiplexer based on quantum-dot cellular automata

Abstract

Quantum-dot Cellular Automata (QCA) is a unique and appealing technique for developing and implementing high-performance and low-power digital circuits at the nanometer scale. In this technology, fault-tolerant circuits guarantee reliability circuits through cells redundancy. Therefore, fault-tolerant and optimized architecture are very important in designing a wide range of QCA circuits. However, although there are some QCA structures for multiplexer designs in the literature, QCA characteristics can be used to design a more optimized multiplexer rather than blindly modeling traditional logic in QCA. As a result, we developed an alternate version of the proposed approaches that leverage fault-tolerant design methodologies. In this article, a new structure for a fault-tolerant 2:1 multiplexer in QCA technology is suggested. Cell redundancy on the wire, NOT gates and majority gates are used. Simulating the suggested designs and demonstrating their correctness was done with QCADesigner 2.0.3. When the additional cell or single missing cell fault occurs in the QCA architecture, the suggested fault-tolerant multiplexer can achieve 90% fault tolerance.