An Efficient on Chip Power Management Architecture for Solar Energy Harvesting Systems

Abstract

Extracting maximum energy from an energy transducer/battery, with minimum loss in an interface circuit is one of the primary design goal of a power management system. An efficient on-chip power management architecture is presented for solar energy harvesting system and it has a peak efficiency improvement of 12% over the traditional architecture. The proposed architecture utilizes single DC-DC converter to maintain regulation at the load, when there is enough and not enough ambient condition to supply load requirements. The proposed power management system has been designed using 0.18-µm CMOS technology node and the circuit simulations demonstrate that the proposed architecture offers system efficiency of 82.4%, under different light conditions.