An Efficient Majority Error Detection in Logic Decoding with Euclidean Geometry Low Density Parity Check (Eg-Ldpc) Codes

Abstract

In a recent article, a technique was proposed to step up the majority logic decoding of variation set low density parity check codes. This is helpful as majority logic decoding can be implemented serially with trouble-free hardware but requires a huge decoding time. The method detect whether a word has errors in the initial iterations of majority logic decoding, and at what time there are no errors the decoding split ends without completing the rest of the iterations. While the majority words in a memory will be error-free, the average decoding time is significantly reduced. The outcome obtained proves that the technique is also effective for EG-LDPC codes. General simulation results are given to precisely estimate the prospect of error detection for different code sizes and numbers of errors.