An efficient embedded processor for object detection using ASIP methodology

Abstract

This paper presents an Application Specific Instruction set Processor (ASIP) for object detection using AdaBoost-based learning algorithm with Haar-like features as weak classifiers. In the proposed ASIP, Single Instruction Multiple Data (SIMD) architecture is adopted for fully exploiting data-level parallelism inherent to the target algorithm.With adding pipeline stages, application-specific registers and custom instructions, AdaBoost algorithm is accelerated by a factor of 13.7× compared to baseline processor. Furthermore, the results show an advantage of the proposed architecture in terms of chip area efficiency while maintain a reliable detection accuracy and achieve real-time object detection at 32fps on VGA video.