An Efficient Design of 3bit and 4bit Flash ADC

Abstract

The performance of Flash Analog-to-Digital converter is greatly influenced by the choice of Comparator and Thermometer-toBinary encoder design. The work describes the design and pre-simulation of a , 3bit and an 4bit analog to digital converter for low power CMOS. It requires 2-1 comparators, an encoder to convert thermometer code to binary code. The design is simulated in cadence environment using spectre simulator under 90nm technology. The pre simulation results for the design shows a low power dissipation of 87uw for the comparator and 1.05mW and 1.984mW power dissipation for 3-bit and 4-bit Flash ADC respectively. The circuit operates with an input frequency of 25MHz and 1.5V supply with a conversion time of 2.162ns and 6.182ns for 3-bit and 4-bit ADC respectively.