An Efficient Automatic Structure Design Method of Silicon-on-Insulator Lateral Power Device Considering RESURF Constraint

Abstract

Reduced surface field (RESURF) technology is one of the most common design optimization criteria of silicon-on-insulator (SOI) lateral power devices. This article proposes a RESURF lateral power device design method using a constrained Bayesian optimization (CBO) framework. By casting the task as a constrained optimization problem, the proposed approach can automatically generate a RESURF structure that meets given breakdown voltage (BV) and ON-resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> ) specifications. The optimization scheme is equipped with two features that can improve the design quality and efficiency. First, design thresholds are used as a safety margin to further assist in reaching the target performance. Second, a model initialization sampling scheme is proposed to guide the sample selection efficiently during initialization steps. Numerical results show that the optimized designs can achieve fully depleted conditions when the breakdown occurs at N <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> N junction and in the body while avoiding the p-n junction breakdown. Additionally, they also show that 1) superior designs can be achieved by introducing the design thresholds and 2) model initialization can boost the efficiency of the optimization model.