An efficient adaptive voltage scaling using delay monitor unit

Abstract

Low power consumption along with better performance has become an important aspect of processor and system design. Low power system design involves reducing power consumption at both component and system levels subject to constraints imposed by the system performance. Many techniques ranging from architectural to system level are available. Among all techniques, voltage scaling is the most effective. In this paper, an adaptive voltage scaling (AVS) technique using delay monitoring unit along with a closed loop control buck converter is presented. The proposed technique scales down the operating voltage based on a timing error provided by a delay monitor unit which predicts the critical path delay before it happens. Based on that, the controller issues a command to set the output of the closed loop buck converter. The buck converter consists of an Analogue to Digital Converter (ADC), a Pulse Width Modulation (PWM) and a Digital compensator. A complete model of the system has been developed using Matlab/Simulink. The system is simulated over a frequency range of 2.7 to 3.6 GHz corresponding to a regulated voltage range of 0.6 to 1.2 V and achieved 21% power savings compared to the system without the AVS technique.