An Automation Methodology for Modeling Posynomial Equations for Use in CMOS OpAmp Synthesis

Abstract

In this paper, we propose a novel methodology to automate the transistor-level sizing of OpAmps. Given the netlist and the specifications of the OpAmp, our methodology automatically produces a set of monomial design equations that can be solved using a geometric programming. The use of monomial models eliminates the overhead of generating elaborate posynomial design equations. This approach produces a design that has the accuracy of the BSIM models used for simulation and the advantage of a quick design time. The results of a two stage OpAmp designed in TSMC 0.25μ technology prove the efficacy of our approach.