Abstract
An area-efficient CMOS bandgap reference (BGR) with switched-current and current-memory techniques is presented. The proposed circuit uses only one parasitic bipolar transistor to generate a reference voltage so that significant area reduction can be achieved. In addition, bipolar transistor device mismatch can be eliminated. The circuit produces an output of about 650 mV, and simulated results show that the temperature coefficient of the output is less than 10.4 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\hbox{ppm}/^{\circ}\hbox{C}$</tex></formula> in the temperature range from 0 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$^{\circ}\hbox{C}$</tex></formula> to 100 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$^{\circ}\hbox{C}$</tex></formula> . The average current consumption is about 49.5 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu\hbox{A}$</tex></formula> in the above temperature range. Furthermore, the output can be set to almost any value. The circuit was designed and simulated in 0.25- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$\mu\hbox{m}$</tex></formula> CMOS technology. The layout occupies less than 0.0011 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\hbox{mm}^{2}$</tex></formula> <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$(100\ \mu \hbox{m} \times 110\ \mu\hbox{m})$</tex></formula> .
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