An Approach to Domain Generic IC with Acceleration of Multi-island GA

Abstract

ASIC while smaller in size, is expensive to develop and tends to lack the flexibility needed to adapt to diverse application scenarios. In our paper, we proposed the concept of “domain general utility.” We designed a DGIC chip which innovative structure to be equivalent to an application layer language, named as LL7, divided into two parts: the control engine LL7.PI, and the user-defined “domain instruction set,” said as LL7.PS. The control engine LL7.PI is suitable for all application fields. Some IP cores can be encapsulated into the form of components, serving as general instruction set LL7.PS. They can both be deployed to the architecture based on the WoB proposed in this paper, bringing the “domain general utility” DGIC into being. The test results showed its advantages consisted in that the DGIC allows the IC to keep the customizable syntax of an ASIC, while retaining flexible, reconfigurable semantic processes, much like a general-purpose CPU. To demonstrate the power of our solution, we tested a multi-island GA based on Xilinx FPGA V5. The test results showed that its acceleration ratio was 3.43 × 104, which was notably better than the results provided by the combined GPU + CPU approach.