An Application Specific Framework for HLS-based FPGA Design of Articulated Robot Inverse Kinematics

Abstract

Over the last decade, High Level Synthesis (HLS) has significantly improved the prototyping and production time for FPGA-based designs involving implementations of highly complex algorithms and applications. This approach has also enabled software developers and programmers to quickly deploy their algorithms, usually written in C/C++ or SystemC, on reconfigurable hardware after applying HLS-based optimizations accordingly. In this paper, an application specific framework is presented that offers a design flow for solving inverse kinematics for n-degrees-of-freedom articulated robotic arms on FPGAs by utilizing HLS. The numerical methods related to inverse kinematics of robotic arms usually involve very complicated equations, and also the iterative nature of such methods leads to having compute-intensive algorithms for solving them, whereas the complexity increases as the degrees of freedom increases. This work proposes a design methodology for deploying such an algorithm, called brute force or trial and error method on reconfigurable hardware using the proposed framework which uses Denavit-Hartenberg parameters of an articulated robotic arm to create C/C++ based inverse kinematics solver with HLS optimizations, which can eventually be synthesized for the target hardware. In this work, we demonstrate as to how a generalized and parametrized design flow can be used to design complex algorithms for reconfigurable hardware in the domain of robotics.