Abstract

A generic charge-based compact model for undoped (lightly doped) quadruple-gate (QG) and cylindrical-gate MOSFETs using Verilog-A is developed. This model is based on the exact solution of Poisson’s equation with scale length. The fundamental DC and charging currents of QG MOSFETs are physically and analytically calculated. In addition, as the Verilog-A modeling is portable for different circuit simulators, the modeling scheme provides a useful tool for circuit designers.

Highlights

  • According to Moore’s law, CMOS transistors continue to scale

  • To expedite further VLSI development using GAA devices, we use Verilog-A to develop the SPICE device model which can be used by circuit/device designers with a simple set of physical parameters

  • We propose a scale-length based GAA MOSFET model

Read more

Summary

Introduction

According to Moore’s law, CMOS transistors continue to scale. The transistor size scaling provides for increased packing density, improves circuit speed, and lowers power consumption. Many small-geometry effects have surfaced such as short-channel effects, limiting the device performance. In order to overcome these issues, improving device gate controllability is necessary. Multigate transistor architecture is regarded as one of the most effective ways to improve the short-channel effects and to enhance the gate controllability [1,2,3]. The gate-all-around (GAA) MOSFETs have drawn much attention for ultimate device scaling. To expedite further VLSI development using GAA devices, we use Verilog-A to develop the SPICE device model which can be used by circuit/device designers with a simple set of physical parameters

Potential Model and I-V Model Based on Scale Length
Charge Model
VLSI Application
Conclusion
Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call