Abstract

In all-digital transmitters (ADTs), delta-sigma modulation (DSM) is the most popular encoding method. However, implementing DSM-ADT on a field-programmable gate array (FPGA) produces problems with high complexity and low carrier frequency (CF) agility. To solve these problems, an agile ADT based on a look-up table (LUT) is proposed in this paper. The encoding and upconversion are implemented using the LUT, which defines the mapping between the intermediate frequency (IF) complex signal and the radio frequency (RF) binary signal. In addition, different CFs correspond to different LUT values. In this way, the CF can be adjusted flexibly by updating the LUT values, which makes the architecture of the ADT simple and easy to implement. To enhance the signal-to-noise ratio (SNR) and coding efficiency(CE), the noise of the encoder is analyzed and key-parameter selection methods are presented. Simulation results show that the proposed architecture achieves better performance in terms of the SNR and CE than current state-of-the-art approaches. The proposed agile ADT is also implemented on an FPGA. For 16-QAM modulated signals with 5 MBd and 20 MBd symbol rates (SRs), most measured SNRs are better than 45 dB and 40 dB, respectively, with CF varies from 0.65 GHz to 6.85 GHz.

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