Abstract

Radio frequency (RF) all-digital transmitter (ADT) is one of the most attractive techniques in the next-generation RF transceivers, especially in the carrier aggregation and multiband, multistandard transmission scenario. Among the multiband RF ADTs reported in recent years, the delta–sigma modulation (DSM)-based scheme is the most popular. However, implementing multiband DSM-based RF ADT in field-programmable gate array (FPGA) produces problems of high complexity, high resource consumption, limited carrier frequency (CF) agility, and poor indicator performance. To address these problems, a dual-band ADT architecture with mapping-based pulse width modulation (MPWM) method is first presented in this article. In the ADT, the dual-band intermediate frequency (IF) signals are mapped to the RF sequence by a lookup table (LUT), and the CF can be adjusted by updating the LUT values. The operation principle of the ADT is explained, and the noise analysis model of MPWM is given. Furthermore, three optimization methods are presented to improve the performance of ADT. To evaluate the proposed architecture and methods, the ADT is implemented on an FPGA chip, and the resource consumption is relatively low. A dual band of 16- and 64-QAM signals with bandwidth (BW) of 20 MHz is tested with different CF and CF spacings. From 1 to 4.1 GHz, the adjacent channel leakage ratio (ACLR) values are below −43 dBc, and the error vector magnitude (EVM) values are below 3.5%. From 4.1 to 6.15 GHz, the ACLR values are below −40 dBc, and the EVM values are below 5%. The proposed architecture and design methods can be applied to triple-band or other more band ADT.

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