An Advanced SOI Pixel Sensor With Anti-Punch-Through Implantation

Abstract

An advanced silicon-on-insulator (SOI) pixel sensor with an anti-punch-through structure is proposed to suppress the effect of total ionizing dose (TID) and crosstalk between the electronics and the sensor. A buried p-well (BPW) and a buried n-well (BNW) are both connected to their respective voltages to shield SOI circuits from the sensor. BNW is used as an electrode with controllable potential, which provides similar functionality as middle silicon in double SOI (DSOI). The biased BPW and anti-punch-through implant are adopted to form a potential barrier to holes in BPW. The lateral electric fields induced by the sidewalls of the pixel accelerate electrons to the N+ charge collector. 2-D and 3-D physical-level simulations are presented to compare this structure with DSOI. The simulation results show that an appropriate operating biasing voltage under a fully depleted condition can be secured by adjusting the anti-punch-through doping. The TID effects, the parasitic capacitance between the electronics and the charge collector, and the charge collection efficiency have been studied.