Abstract

A fully depleted silicon-on-insulator (SOI) pixel detector with multijunction structure in p-type substrate is proposed to reduce the diode capacitance and improve the effective shielding between the SOI circuits and sensor. A buried p-well (BPW) and a buried n-well (BNW) are applied to their respective bias voltages to shield SOI circuits from the sensor in the substrate. BPW is biased to counteract the back-gate effect. A deeply BPW is employed to form a potential barrier to electrons in BNW, stopping the front-to-back leakage current. Lateral electric field is also formed to accelerate holes to the p+ charge collector. The simulation results demonstrate that the pixel can achieve its objectives under a full depletion condition. The capacitance of the charge collector can be reduced, which depends primarily on the charge-collector/BNW junction.

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