Abstract
An advanced high-voltage CMOS process has been developed for custom products with on-chip electrically erasable programmable read-only memory (EEPROM). The minimum feature size is 1.2 mu m. Process adjustments to achieve >18-V high-voltage operation are explained in detail. Performance of short-channel transistors with L/sub eff/ >
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
