10.5 A Fully Integrated 27dBm Dual-Band All-Digital Polar Transmitter Supporting 160MHz for WiFi 6 Applications

Abstract

The ever-increasing demand for wireless data traffic requires WiFi transceivers to support wider (160MHz) bandwidths (BW) and higher-order modulation schemes (1024QAM), with future standards expected to bring in even more demanding requirements. As many WiFi-enabled devices are battery powered and mobile, there is also a continuous demand to improve power, cost and form factor, which can only be achieved by a high level of integration in advanced digital CMOS processes. WiFi transmitter (TX) integration has been demonstrated with a quadrature analog TX (Q-ATX) topology using Class-AB CMOS power amplifiers (PAs) in [1]. Recently there is a shift towards digital TX (DTX) architectures due to their more compact die area, scalability in advanced CMOS processes, and improved power efficiency of their switching PAs. Quadrature DTX (Q-DTX) topologies [2] benefit from a straightforward extension of Q-ATX topologies and high BW support, but their main drawbacks are reduced output power and efficiency due to I/Q combining and limited EVM due to IQ mismatch and nonlinearities. Polar DTX (P-DTX) topologies using various phase-generation techniques were proposed including 2-point modulation [3], I/Q mixing [4] and a digitally controlled delay line digital-to-time converter (DCDL-DTC) [5]. P-DTX solutions proposed so far suffered from limited BW (≤40MHz) and limited EVM floor, including our previous work [6], which also did not support the 5-to-6GHz band, nor an integrated PA. This work presents a 27dBm P-DTX architecture for dual-band WiFi 6 operation that supports 160MHz BW and MCS11 1024-QAM OFDM. It incorporates: (a) a zero-crossing-based CORDIC algorithm, (b) a dual-band digitally controlled two-point edge interpolator (DCEI2)-DTC phase modulator and, (c) a switched-capacitor digital PA (SC-DPA) with optimal transformer combining in order to achieve the high bandwidth, low EVM and improved efficiency.