An Active Voltage Balance Method Based on Adjusting Driving Signals Time Delay for Series-Connected IGBTs

Abstract

Connecting low-voltage insulated gate bipolar transistor (IGBT) in series to withstand much higher dc -link voltages has some advantages over using a single high-voltage IGBT or the multilevel topologies. However, severe voltage imbalance during turn-off transient remains to be solved. In all existing methods, adjusting driving signal time delay (ADSTD) is attractive and has no penalty of sacrificing the switching performance of IGBT. Moreover, instead of using a snubber, the voltage imbalance caused by the difference in tail currents can be mitigated by using ADSTD as well. An active voltage balance method based on ADSTD is proposed and verified by experiments in this article. Besides, a more accurate equivalent capacitance for IGBT considering the stored carriers in the n-drift region is discussed. The factors affecting a proper driving signal time delay are also discussed in detail. These contents are well supported by experimental results as well.