An Active Voltage Balancing Control Based on Adjusting Driving Signals Time Delay for Series-Connected IGBTs

Abstract

Severe voltage imbalance during the turn-off transient can be observed when Connecting low-voltage power devices in series to block much higher DC-Link voltages. In all existing solutions, adjusting driving signals time delay (ADSTD) is attractive and has no penalty of sacrificing switching performance. Typically, bulk snubbers are introduced to eliminate the voltage imbalance during the tail current period of insulated gate bipolar transistor (IGBT). Fortunately, instead of using snubbers, the voltage imbalance caused by the tail current can be solved by using ADSTD as well. In this paper, an active voltage balancing control based on ADSTD is proposed and verified by experiments. Indeed, even without the snubbers, the proposed method works well and has no penalty of introducing additional snubber losses or sacrificing switching performance of IGBTs.