An accelerated detailed equivalent model for modular multilevel converters

Abstract

Detailed Equivalent Models (DEMs) of Modular Multilevel Converters (MMCs) are generally developed based on Thevenin equivalent circuits with a time-varying resistor. This approach may become computationally inefficient, specifically for the simulation of large power systems with many nodes, where the network admittance matrix needs to be frequently re-inverted every time a switching event occurs. This paper proposes a novel strategy to eliminate admittance matrix re-inversions during the converter’s normal operation and restrict it only to when the converter undergoes blocking. The proposed DEM thus yields marked reductions in the simulation time of MMC circuits, and is particularly useful in studies wherein repetitive simulations are necessary. Models are implemented for MMCs with half-bridge (HBSM) and full-bridge (FBSM) sub-modules in the PSCAD/EMTDC simulator, and their accuracy is thoroughly validated for normal and blocked operating conditions. It is shown that the developed models are 30% and 60% more computationally efficient, respectively, for HBSM and FBSM MMCs in comparison to existing DEMs.