An 8-bit Low-Cost String DAC With Gradient Errors Suppression to Achieve 16-bit Linearity

Abstract

Resistor string is one of the classic digital-to-analog converter (DAC) architectures and has dominant applications where guaranteed monotonicity is important. For high-resolution string DACs, gradient errors limit the linearity performance by causing mismatch in the resistor arrays. In this paper, a low-cost practical string DAC structure with gradient error suppression is proposed. It achieves high linearity by dividing a string into multiple smaller substrings and placing them in a pattern where up to $2^{nd}$ order gradients are suppressed. The derivation is provided to explain how the $2^{nd}$ order gradient is mitigated. Averaging and interpolation are implemented at the substrings’ outputs to recover the bits of resolution without sacrificing the linearity improvement. An 8-bit prototype is fabricated in a $0.13~\mu \text{m}$ CMOS technology and occupies 2.6 mm2. It achieves 16-bit linearity performance without trimming and calibration.