Abstract
This letter reports 100nm channel length vertical thin-film transistors (VTFTs) in hydrogenated amorphous silicon (a-Si:H) technology. The channel length is defined by means of a dielectric film thickness, realized by an anisotropic reactive ion etching process to yield a 90° vertical transistor structure. Furthermore, the device area of the vertical TFT structure is less than ∼1∕3 that of the ubiquitous lateral TFT structure. The 100nm channel length VTFTs exhibit an ON/OFF current ratio of 108, a threshold voltage of 2.8V, and a subthreshold slope of 0.8V∕dec.
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