Amorphous IGZO Thin-Film Transistors With Ultrathin Channel Layers

Abstract

The impact of decreasing channel layer thickness on the electrical performance of RF-sputtered amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs) is investigated through the evaluation of drain current versus gate voltage ( $I_{D}$ – $V_{G}$ ) transfer curves. For a fixed set of process parameters, it is found that the turn-on voltage, $V_{\mathrm{\scriptscriptstyle ON}}$ (off-drain current, $I_{D}^{\mathrm{\scriptscriptstyle OFF}}$ ) increases (decreases) with decreasing a-IGZO channel layer thickness ( $h$ ) for $h nm. The $V_{\mathrm{\scriptscriptstyle ON}}-h$ trend is attributed to a large density $(3.5 \times 10^{12}~\textrm {cm}^{-2})$ of backside surface acceptorlike traps and an enhanced density $(3 \times 10^{18}~\textrm {cm}^{-3})$ of donorlike trap states within the upper 11 nm from the backside surface. The precipitous decrease observed in $I_{D}^{\mathrm{\scriptscriptstyle OFF}}-h$ when $h nm is ascribed to backside surface acceptorlike traps and the closer physical proximity of the backside surface when the channel layer is ultrathin. An alteration of the sputtering process gas ratio of Ar/O2 from 9/1 to 10/0 and a reduction of the annealing temperature from 400 °C to 150 °C result in improved transistor performance for a $h \approx 5$ nm a-IGZO TFT, characterized by $V_{\mathrm{\scriptscriptstyle ON}} \approx 0$ V, field-effect mobility of $\mu _{\textrm {FE}} = 9~\textrm {cm}^{2} \textrm {V}^{-1} \textrm {s}^{-1}$ , subthreshold swing of $S=90$ mV/decade, and drain current on-to-off ratio of $I_{D}^{\mathrm{\scriptscriptstyle ON}-\mathrm{\scriptscriptstyle OFF}} = 2 \times 10^{5}$ .