Alternative Post-Processing on a CMOS Chip to Fabricate a Planar Microelectrode Array

Francisco López-Huerta,Blanca Cervantes-Sanchez,Johan J Estrada-López,Blanca S Soto-Cruz,Enrique Soto,Agustín L Herrera-May,Carlos Zuñiga-Islas

doi:10.3390/s111110940

Abstract

We present an alternative post-processing on a CMOS chip to release a planar microelectrode array (pMEA) integrated with its signal readout circuit, which can be used for monitoring the neuronal activity of vestibular ganglion neurons in newborn Wistar strain rats. This chip is fabricated through a 0.6 μm CMOS standard process and it has 12 pMEA through a 4 × 3 electrodes matrix. The alternative CMOS post-process includes the development of masks to protect the readout circuit and the power supply pads. A wet etching process eliminates the aluminum located on the surface of the p+-type silicon. This silicon is used as transducer for recording the neuronal activity and as interface between the readout circuit and neurons. The readout circuit is composed of an amplifier and tunable bandpass filter, which is placed on a 0.015 mm2 silicon area. The tunable bandpass filter has a bandwidth of 98 kHz and a common mode rejection ratio (CMRR) of 87 dB. These characteristics of the readout circuit are appropriate for neuronal recording applications.

Highlights

The complementary metal oxide semiconductor (CMOS) technology can be used to fabricate a planar microelectrode array with high spatial resolution, very good reproducibility and control of their dimensions
This paper is organized as follows: in Section 2, we describe the readout circuit composed of a bandpass filter and an operational amplifier, and the mechanical frame for handling CMOS chip
In order to check the results of our alternative post-processing on a CMOS chip, it is necessary to revise the release of the p+-type silicon of the planar microelectrode array (pMEA)

Summary

Introduction

The complementary metal oxide semiconductor (CMOS) technology can be used to fabricate a planar microelectrode array (pMEA) with high spatial resolution, very good reproducibility and control of their dimensions. Wet etching uses the etch selectivity between the 111 planes and 100 or 110 planes in aqueous alkaline solutions (e.g., KOH or NaOH) These micromachining processes need the design of a photo-mask set in order to translate the geometric patterns onto a wafer. The post-processing of a chip must protect the electronic circuits during the etching step. In order to overcome these problems, we present an alternative post-process to protect the electronic circuitry and the power supply pads of a CMOS chip, which is etching to release a pMEA. It can be used for monitoring neuronal activity of vestibular ganglion neurons in newborn rats. This post-process step can be easy implemented and adapted to others types of CMOS chips to release their microstructures

Methods

Results

Conclusion