Alternative 3D Small form Factor Methodology of System in Package for IoT and Wearable Devices Application

Abstract

Recently, the electronics industry is moved maturely on the mobile/tablet market. The next fast growing opportunity market will be the Internet of Things (IoT) and Wearable Deivces in the near future. This advanced technology/package need to provide the ideal solution for small form factor, thin profile, high electrical performance, multi-function integration and low cost are the most critical requirements. To approach these requirements, the System in Package (SiP) is a combination of one or more semiconductor devices plus optionally passive components that define a certain functional block within a small package, mounted onto the system's main board assembly. SiP can be integrated multi-function chips into a single package and offer a small form factor and a low cost system solution for many wireless connectivity applications. In this paper, an alternative 3D small form factor SiP methodology will use surface mount technology (SMT) and 3D structure of stacking die on passives to shrink the package size. The calculation of package size can be shrunk around 25% area and package size reduced from 11.5 × 11.5mm to 10x10mm. For the experiment including the DOE (Design of Experiment) study for the passive quantities optimization and also die tilt performance between different passive quantities. By utilizing exiting package solutions (such as wire bond, flip chip, hybrid or stacked die process), a SiP module provide a unique opportunity to address cost, performance, and time-to-market. Considering the limitations of power consumption and form factor, such as Bluetooth Low Energy (BLE), and wireless connectivity module will become the major requirements for SiP platforms in near marketing. The characterization analysis will utilize simulation methodology & typical reliability testing (Temperature Cycle Test, High Temperature Storage Test, unbias HAST) results as a verification for 3D stacking die on passives of SiP feasibility structure. Finally, this paper will find out the suitable 3D stacking die on passives of SiP structure and feasibility data for future IoT and wearable devices application.