Alpha particle mitigation strategies to reduce chip soft error upsets

Abstract

The continued scaling of complementary metal oxide semiconductor device technologies has lead to continued device shrinkage and decreases in the Vdd, the operating voltage of the device transistors. Scaling has meant denser circuitry overall, thinner silicon (e.g., silicon on insulator) in logic applications, and less charge on capacitors for volatile memory. These trends have resulted in devices being more sensitive to soft errors since now low energy alpha particles can flip a memory bit or alter timing in a logic circuit. The alpha particle source is, in many cases, self-inflicted, because alpha particles are commonly generated in materials adjacent to the chip, solders, and in the packaging. In this paper we discuss several schemes by which these alpha particles can be blocked, such that all of their energy is absorbed before reaching the sensitive silicon circuitry at the transistor level. These alpha blocking layers are shown to be effective both through the use of modeling and through experimental measurements.