All-Digital PLL with Ultra Fast Acquisition

Abstract

A fully-digital frequency synthesizer for RF wireless applications has recently been proposed. At its foundation lies a digitally-controlled oscillator that deliberately avoids any analog tuning controls. The conventional phase/frequency detector, charge pump and RC loop filter are replaced by a time-to-digital converter and a simple digital loop filter. When implemented in a digital deep-submicron CMOS process, the proposed architecture is more advantageous over conventional charge-pump-based PLL's since it exploits signal processing capabilities of digital circuits and avoids relying on the fine voltage resolution of analog circuits. In this paper, we present novel techniques used in the all-digital PLL to achieve an ultra-fast frequency acquisition of les50 mus while maintaining excellent phase noise and spurious performance during transmission and reception. This approach has been validated and incorporated in a commercial single-chip Bluetooth radio realized in 130-nm CMOS