Abstract
In order to reduce IDDQ testing time, it is important to reduce the number of IDDQ measurement vectors, because IDDQ measurement is a time-consuming process. For obtaining minimum number of IDDQ measurement vectors for sequential circuits, fault simulation needs to be performed without fault-dropping, thus requiring very high simulation time. In this paper we propose algorithms to select small number of IDDQ measurement vectors. The proposed algorithms can concurrently simulate multiple faults and use heuristics for selection of IDDQ measurement vectors to reduce simulation time. Experimental results are presented to demonstrate the effectiveness of the proposed method.
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