<title>Algorithm-based fault-tolerant array architecture for Fermat number transform</title>

Abstract

ABSTRACTFor many real—time and scientific applications, it is desirable to perform signal and image processing algorithms by means of special hardware with very high speeds. With the advent of VLSI technology, largecollections of processing elements, which cooperate with each other to achieve high—speed computation,have become economically feasible. In such systems, some level of fault tolerance must be obtained to ensurethe validity of the results. Fermat number transforms (FNT's) are attractive for the implementation of digitalconvolution because the computations are carried out in modular arithmetic which involves no round—offerror. In this paper we present a fault tolerant linear array design for FNT by adopting the weighted checksumapproach. The results show that the approach is ideally suited to the FNT since it offers fault tolerance, withvery low cost, free from round-off error and overflow problems. 1. INTRODUCTION The high computational needs of many applications can now be met using highly parallel special—purposesystems that can be produced through the use of very large scale integration (VLSI) technology. Arrayprocessors are an example of such systems: they consist of a number of identical processing elements (PEs)