Advances in shared-memory designs for gigabit ATM switching

Abstract

In this paper, we describe a brief history of advances in the design and implementation of shared-memory asynchronous transfer mode (ATM) switches for high-speed high-performance applications, focusing on key technological advances that have enabled significant prototyping achievements in our research and development programs. We also discuss a series of gigabit switch prototypes and their unique technological characteristics, evolving from an early rudimentary design to today's sophisticated platform. Capable of expanding its capacity from 5 to 160 Gb/s and beyond, today's platform supports features such as traffic policing, traffic shaping, per-virtual channel (VC) queuing, multicast, and priority and errorless protection switching. Technological advances that have taken place in the past five years have enabled us to reduce the size of switch fabric hardware by a factor of four (from four boards to one board for a 20-Gb/s capacity design) and increase its total memory capacity by a factor of more than 250 (from 2K cells to over 500k cells).