Abstract

300 mm SOI wafers with sub-100nm thick active Si layers are currently produced in large quantities and used in advanced microprocessor circuits. To further enhance the performance of the next generation of devices, strained Si layers on insulator are being developed. The lattice mismatch between silicon and SiGe alloys, combined with layer transfer through the Smart Cut/spl trade/ technology allow forming two types of strained Si - strained Si on SiGe on insulator, known as SGOI, and strained Si directly on insulator, known as sSOI. Fabrication methods and wafer characteristics for SOI, SGOI, and sSOI are discussed here.

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