Abstract
We report a comprehensive evaluation and overview of the latest developments and technology challenges of FinFET-based devices. They offer improved electrostatics and steeper sub-threshold slopes, attractive for enabling further CMOS scaling, but can also suffer from higher parasitic resistance and parasitic capacitance for narrow Fin devices. Critical solutions to minimize the impact of the latter are here addressed, demonstrating their viability for replacing planar CMOS devices. Multiple-VT CMOS can be achieved with capping technology, with aggressively scaled Ring Oscillators (RO) and SRAM cells showing excellent performance and matching behavior.
Published Version
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