Advanced Characterization and Analysis of Random Telegraph Noise in CMOS Devices

Abstract

RTN is one of the most relevant time-dependent variability sources and, as such, must be taken into account during the design of memories, digital and analog VLSI-integrated circuits (ICs), to implement reliability-aware circuits and systems. An accurate RTN characterization at device level becomes mandatory, to obtain as much information as possible on this reliability issue. In this regard, some advanced RTN characterization and analysis techniques are presented in this chapter, which is divided in four sections. In the first one, an introduction to the RTN phenomenology is presented, describing the most important RTN features and emphasizing its importance in the most recent technologies. In the second one, an advanced RTN analysis procedure, the weighted time lag plot (w-TLP) method, is presented as an efficient and robust method to identify defects in the device and to obtain an accurate description of the resulting RTN, even when the background noise is large. The stochastic and transient nature of RTN makes necessary a statistical characterization and the use of high-time resolution techniques, to fully characterize the RTN phenomenon. Then, in the third section, some of the current approaches to fulfill these requirements are presented. On the one hand, an experimental setup that provides a higher time resolution than that provided by the standard characterization equipment is shown. This new setup, in combination with the w-TLP method, allows getting additional and relevant information about the RTN phenomenon, hidden when using standard methodologies. On the other hand, some array-based solutions have been presented to allow the required RTN statistical characterization. To illustrate the capabilities of the different methodologies shown in this chapter, in the fourth section, some application examples of the w-TLP method have been included.