Advanced Bit Flip Concatenates BCH Code Demonstrates 0.93% Correctable BER and Faster Decoding on (36 864, 32 768) Emerging Memories

Abstract

Bose–Chaudhuri–Hocquenghem (BCH) and low-density-parity-check (LDPC) are two popular error correcting codes for non-volatile memories. However, the BCH has limited error correction ability, while the LDPC requires multiple sensing operations per read. In this paper, an advanced bit flip (ABF) scheme is proposed to obtain high-correctable raw bit error rate (BER), fast decoding, and one sensing per read, simultaneously. During write, first, the ABF uses data mapping to correct major program errors. Then, the BCH is used to correct the remaining errors. The performance of concatenated ABF + BCH is calculated by using 108 writes data from a nano-random access memory array. On 32 768 user data bits, ABF + BCH reduces 54% parity size and 17% decoding latency compared with only using BCH. Furthermore, ABF + BCH performances are calculated and analyzed statistically on a hypothetical memory array with binominal error distribution. By using fixed 512 bytes parity, ABF + BCH obtains 0.93% correctable raw BER when set + retention BER is 0.1%. Moreover, ABF + BCH shows less decoding latency than only using BCH.