Polar Coding for Spin-Torque Transfer Magnetic Random Access Memory (STT-MRAM)

Abstract

Spin-torque transfer magnetic random access memory (STT-MRAM) has emerged as a promising non-volatile memory (NVM) technology with various potential applications such as working as the embedded NVM or replacing the stand alone DRAM [1]. However, STT-MRAM suffers from process variations and thermal fluctuations, leading to both the write errors and read errors [2]. Hence it is critical to construct effective error correction codes (ECCs) to improve the system reliability. A single-error-correcting (71, 64) Hamming code is adopted by Everspin's 16Mb MRAM [3]. Extended Hamming codes with hybrid decoding are further proposed for STT-MRAM for the purpose of replacing DRAM [2]. Multiple-error-correcting BCH codes as well as low-density parity-check (LDPC) codes have also been investigated for STT-MRAM [4], for applications with relaxed requirement of the read latency. In this work, we propose, for the first time, the design and optimization of polar codes [5] for the STT-MRAM channel. Compared with LDPC codes with short code lengths, polar codes can achieve better error performance with lower decoding complexity. Moreover, polar codes allow easy adjustment of the code rates with a single encoder/decoder, which is a significant advantage over the Hamming codes and BCH codes. Such rate-compatible property can mitigate the raw bit error rate (BER) diversity of STT-MRAM cells caused by process variations.