Abstract
In the frame of advanced imager technology development, Ti-silicide direct contacts are commonly used in the device integration in the very near environment of pixel area. Therefore, a low resistivity, high yield, and reliability are the principal requirements for these integrated contacts. As previously reported, the Ti silicide formation at the bottom of contact is quite dependant to the surface preparation scheme. In this paper, various pre-clean processes combined with Ar plasma and Siconi™ etchings are in-depth analysed based on blanket wafers and devices characterizations through ellipsometry, TEM-EDX, contact resistivity, yield and reliability measurements. Strong variations of limited yield and contacts chain resistance are then observed. Based on these results, the lower contact resistance with an improved yield is finally achieved for a pre-clean sequence including Ar plasma before an adapted Siconi™ clean. So far, for this new process sequence, the high wafer temperature during the Siconi™ etch step induces lower etch amount which is corrected by a longer “pre-etch” time.
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