Abstract

The paper presents current mode Analog to Digital Converters (ADC) for a standard digital CMOS technology in a nm scale. It is shown that such converters composed of a fully differential current mode integrator make it possible to achieve a several-bit resolution necessary for pipeline processing. The proposed fully differential structure provides a 1-bit higher resolution in comparison to a non-balanced structure. The goal of the paper is obtained without voltage increasing above the standard 1.2 V supply. The pipelined ADC, composed of two 5-bits converters, consumes 1.5 mW of power and its Walden figure-of-merit equals 104.34 fJ/conv.

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