Adaptive Routing Algorithms and Implementation for TESH Network

Yasuyuki Miura,Masahiro Kaneko,Shigeyoshi Watanabe,M M Hafizur Rahman

doi:10.4236/cn.2013.51004

Abstract

The Tori-connected mESH (TESH) Network is a k-ary n-cube networks of multiple basic modules, in which the basic modules are 2D-mesh networks that are hierarchically interconnected for higher level k-ary n-cube networks. Many adaptive routing algorithms for k-ary n-cube networks have already been proposed. Thus, those algorithms can also be applied to TESH network. We have proposed three adaptive routing algorithms—channel-selection, link-selection, and dynamic dimension reversal—for the efficient use of network resources of a TESH network to improve dynamic communication performance. In this paper, we implement these routers using VHDL and evaluate the hardware cost and delay for the proposed routing algorithms and compare it with the dimension order routing. The delay and hardware cost of the proposed adaptive routing algorithms are almost equal to that and slightly higher than that of dimension order routing, respectively. Also we evaluate the communication performance with hardware implementation. It is found that the communication performance of a TESH network using these adaptive algorithms is better than when the dimension-order routing algorithm is used.

Highlights

Interconnection networks are the key elements for building massively parallel computers consisting of hundreds or thousands of processors [1]
We have proposed three adaptive routing algorithms, channel select (CS), link select (LS), dynamic dimension reversal (DDR) along with dimension-order routing with their hardware implementation for the Tori-connected mESH (TESH) network
Using the routing algorithms described in this paper and with uniform and hot-spot traffic patterns, we have evaluated the dynamic communication performance of a TESH network

Summary

Introduction

Interconnection networks are the key elements for building massively parallel computers consisting of hundreds or thousands of processors [1]. A Tori connected mESH (TESH) network [2,3,4,5,6] is a hierarchical interconnection network for large-scale on-chip multicomputers It consists of multiple basic modules (BMs) which are 2D-mesh networks and the BMs are hierarchically interconnected by a 2Dtorus (k-ary 2-cube) to build higher level networks. We have proposed a deterministic, dimension-order routing algorithm [7] for the TESH network and have shown that Level-3 TESH networks have higher performance than a k-ary 2-cube. Many adaptive routing algorithms have been proposed for k-ary n-cube networks [9,10,11,12,13]. It is necessary to evaluate the router delay with practical hardware implementation of the proposed routing algorithms. The main objective of this paper is the hardware implementation of the proposed adaptive routing algorithms of TESH network

Objectives

Results

Conclusion