Abstract
This paper describes a novel active-feedback frequency compensation (AFFC) technique for low-power multi-stage amplifiers. With a high-speed active feedback block, the proposed compensation technique significantly improves both the frequency and the transient responses of the amplifier. Implemented by a standard 0.8/spl mu/m CMOS process, a three-stage AFFC amplifier achieves 100dB gain, 4.5MHz gain-bandwidth product, 65/spl deg/ phase margin and 1.5V//spl mu/s slew rate with 0.4mW power consumption when driving a 100pF capacitive load.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
