Abstract

CMOS technology has been widely used for VLSI design. For high speed designs, BiCMOS technology has been proposed. However, BiCMOS technology is more complex to build, and is not very scalable below 2 V. The author proposes a new paradigm for VLSI design, which improves the speed, and yet employs only CMOS technology. This is accomplished by using two different threshold voltages for each of the pMOS and nMOS transistors.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call